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Table 4 Device utilization summary (estimated values) for the proposed technique

From: An optimizing technique for using MATLAB HDL coder

Logic utilization

Utilization (%)

Number of slice registers

20

Number of slice LUTs

72

Number of fully used LUT-FF pairs

35

Number of block RAM/FIFO

16

Number of BUFG/BUFGCTRL/BUFHCEs

6